64 lines
2.5 KiB
C
64 lines
2.5 KiB
C
/*
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* Copyright (c) 2013
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* The President and Fellows of Harvard College.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _MIPS_MEMBAR_H_
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#define _MIPS_MEMBAR_H_
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/*
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* On the mips there's only one memory barrier instruction, so these
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* are all the same. This is not true on many other CPUs (x86, arm,
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* sparc, powerpc, etc.) We also mark the instruction as a compiler-
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* level barrier by telling gcc that it destroys memory; this prevents
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* gcc from reordering loads and stores around it.
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*
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* See include/membar.h for further information.
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*/
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MEMBAR_INLINE
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void
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membar_any_any(void)
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{
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__asm volatile(
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".set push;" /* save assembler mode */
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".set mips32;" /* allow MIPS32 instructions */
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"sync;" /* do it */
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".set pop" /* restore assembler mode */
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: /* no outputs */
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: /* no inputs */
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: "memory"); /* "changes" memory */
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}
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MEMBAR_INLINE void membar_load_load(void) { membar_any_any(); }
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MEMBAR_INLINE void membar_store_store(void) { membar_any_any(); }
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MEMBAR_INLINE void membar_store_any(void) { membar_any_any(); }
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MEMBAR_INLINE void membar_any_store(void) { membar_any_any(); }
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#endif /* _MIPS_MEMBAR_H_ */
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